zmk/app/boards/arm/pillbug/pillbug-pinctrl.dtsi
2023-04-05 22:55:38 -07:00

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/*
* Copyright (c) 2022 The ZMK Contributors
* SPDX-License-Identifier: MIT
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_RX, 0, 8)>;
bias-pull-up;
};
group2 {
psels = <NRF_PSEL(UART_TX, 0, 6)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_RX, 0, 8)>,
<NRF_PSEL(UART_TX, 0, 6)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 15)>,
<NRF_PSEL(TWIM_SCL, 0, 13)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 15)>,
<NRF_PSEL(TWIM_SCL, 0, 13)>;
low-power-enable;
};
};
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 40)>,
<NRF_PSEL(SPIM_MOSI, 0, 11)>,
<NRF_PSEL(SPIM_MISO, 1, 26)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 40)>,
<NRF_PSEL(SPIM_MOSI, 0, 11)>,
<NRF_PSEL(SPIM_MISO, 1, 26)>;
low-power-enable;
};
};
};